PCB Design Tools
VIA CURRENT CAPACITY CALCULATOR
Determine maximum current capacity for PCB vias based on diameter, plating thickness, and temperature rise.
Calculate the maximum current a PCB via can safely carry based on IPC-2221 standards. Enter drill diameter, plating thickness, temperature rise, and board thickness — results update in real time. Use the required current input to determine how many parallel vias your design needs.
Input Parameters
0.30 mm
1.57 mm
Used to calculate the number of parallel vias needed
Results
Max Current per Via
Cross Section
34.56 mil²
Via Resistance
1.218 mΩ
V-Drop @ Max I
2.100 mV
V-Drop @ 1.00A
1.218 mV
1 via in parallel
Via Cross-Section (Top View)
Via Current Capacity Calculator Results
Generated by calpak-usa.com/Resources/Via-Current-Capacity-Calculator
| Drill Diameter | 12.0 mil (0.30 mm) |
| Plating Thickness | 1.0 mil (25µm) — Standard |
| Temperature Rise | 10 °C |
| Board Thickness | 62 mil (1.57 mm) |
| Max Current / Via | 1.72 A |
| Cross Section Area | 34.56 mil² |
| Via Resistance | 1.218 mΩ |
| Voltage Drop @ Max I | 2.100 mV |
| Required Current | 1.00 A |
| Vias Needed | 1 |
| V-Drop @ Required I | 1.218 mV (1 via) |
Calculated using IPC-2221 standard. For reference only — always verify with your PCB fabricator.
Understanding PCB Via Current Capacity
A PCB via is a plated-through hole that creates electrical connections between copper layers of a printed circuit board. Current flows through the copper barrel — a thin-walled hollow cylinder formed during the electroplating process. The current-carrying capacity of a via depends on the cross-sectional area of this copper barrel, which is determined by the drill diameter and the plating thickness.
This calculator uses the IPC-2221 empirical formula to estimate via current capacity. The formula was originally developed for traces, but the industry-standard approach applies it to vias by calculating the barrel cross-section as a hollow cylinder: Area = π × t × (D − t), where D is the drill diameter and t is the plating thickness.
For high-current designs, multiple vias in parallel are commonly used. This approach distributes current across several vias, reducing the thermal stress on any single via and providing redundancy. When calculating parallel vias, remember that current sharing is never perfectly equal — practical designs should include a 10-20% margin.
IPC Class 3 (high-reliability aerospace/defense) requires minimum 1.0 mil (25μm) copper plating in vias. For thermally demanding applications, consider using vias with heavier plating (1.4–2.0 mil) or filled and capped vias. Calpak USA's engineering team can review your via design for current capacity and thermal reliability. Contact us for a DFM review.
Quick Reference: Via Current Capacity
1.0 mil plating, 10°C temperature rise, 62 mil board thickness
| Drill Dia (mil) | Area (mil²) | Max Current (A) | Resistance (mΩ) |
|---|---|---|---|
| 8 | 22.0 | 0.65 | 1.91 |
| 10 | 28.3 | 0.79 | 1.49 |
| 12 | 34.6 | 0.92 | 1.22 |
| 15 | 44.0 | 1.10 | 0.96 |
| 20 | 59.7 | 1.40 | 0.71 |
| 30 | 91.1 | 1.95 | 0.46 |
Values calculated using IPC-2221 formulas. For reference only — always verify critical via designs with thermal simulation and your PCB fabricator's capabilities.
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